AD9546SLASHPCBZ datasheet(102/205 Pages) AD

102 / 205 page

AD9546

Data Sheet

Rev. 0 | Page 102 of 205

N Shot Pattern Generation

An N shot pattern consists of a specified clock segment and gap

segment. To assign the desired number of clock segment cycles,

use the 6-bit unsigned integer in Bits[5:0] of Register 0x10D3 for

PLL0 and Register 0x14D3 for PLL1. To assign the desired

number of gap segment cycles, use the 8-bit unsigned integer in

Bits[7:0] of Register 0x10D2 for PLL0 and Register 0x14D2 for

PLL1.

As shown in Figure 70, the clock and gap segments are in units

of the Q divider output period. The N shot generator treats a

clock segment value of 0 as comprising zero clock cycles and a

gap segment value of 0 as comprising 1 clock cycle. Thus, the

net effect of programming a clock segment of 0 and a gap

segment of 0 is no output.

The N shot generator is capable of burst or periodic gapped

operation. To select burst or periodic operation, use Bit 6 of

When Bit 6 = 0, the N shot generators operate in burst mode

(see Figure 71). When Bit 6 = 1, the N shot generators operate

in periodic gapped mode (see Figure 72).

In burst operation, the rising edge of the trigger signal constitutes

the trigger event. Prior to the burst, the generator is in the default

state (Logic 0), which the generator holds until triggered (see

the N Shot Triggering section).

When triggered, the N shot generator produces an output

sequence (see the bottom trace of Figure 70). At the end of the

sequence, the N shot generator remains in its default state

(Logic 0).

In burst operation, the output appears as a sequence of Q divider

cycles per the programmed clock segment value (in Figure 70, the

clock segment is 6). The gap period is effectively an extension of

the default output condition, which is the low state (in Figure 70,

the gap segment is 10).

In periodic operation, the logic level of the trigger matters (rather

than the rising edge as in burst mode). The N shot generator,

starting from its default state (Logic 0), waits for the trigger to

assume a Logic 1 state. At this point, the N shot generator begins

repeatedly generating the burst pattern (clock segment pulses,

then gap segment pulses), per Figure 72. The N shot generator

continues generating burst patterns until the trigger assumes a

Logic 0 state. The occurrence of the Logic 0 state informs the

generator to stop synchronously. That is, if the generator is not in

the gap portion of the burst, the generator stalls at the end of the

current pulse as shown in Figure 73. Furthermore, returning the

trigger signal to Logic 1 causes the pattern to resume from where

it previously stopped (that is, with the absent pulses shown in

Figure 73).

Q DIVIDER

OUTPUT

CLOCK

OUTPUT

Q DIVIDER PERIOD BASED ON ITS INPUT CLOCK AND DIVIDE RATIO

CLOCK SEGMENT = 6

GAP SEGMENT = 10

TIME

Figure 70. N Shot Plus Gap Clock Signal

Q DIVIDER

OUTPUT

CLOCK

OUTPUT

Q DIVIDER PERIOD (PER ITS INPUT CLOCK AND DIVIDE RATIO)

CLOCK SEGMENT = 6

GAP SEGMENT = 10

TRIGGER

BURST

RISING EDGE OF

TRIGGER INITIATES

BURST

BURST ENDS AFTER CLOCK AND GAP Q DIVIDER CYCLES

TIME

Figure 71. Burst Clock Signal

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