WM8281ECSSLASHR datasheet(163/392 Pages) CIRRUS

163 / 392 page

WM8281

Rev 4.0

163

AIF DIGITAL PULL-UP AND PULL-DOWN

The WM8281 provides integrated pull-up and pull-down resistors on each of the AIFnLRCLK,

AIFnBCLK and AIFnRXDAT pins. This provides a flexible capability for interfacing with other devices.

Each of the pull-up and pull-down resistors can be configured independently using the register bits

described in Table 46, Table 47 and Table 48. When the pull-up and pull-down resistors are both

enabled, the WM8281

provides a ‘bus keeper’ function on the respective pin. The bus keeper function

holds the logic level unchanged whenever the pin is undriven (eg. if the signal is tri-stated).

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R3107

(0C23h)

Misc Pad

Ctrl 4

AIF1LRCLK_PU

AIF1LRCLK Pull-Up Control

0 = Disabled

1 = Enabled

Note - when AIF1LRCLK_PD and

AIF1LRCLK_PU are both set to ‘1’, then a

‘bus keeper’ function is enabled on the

AIF1LRCLK pin.

AIF1LRCLK_PD

AIF1LRCLK Pull-Down Control

0 = Disabled

1 = Enabled

Note - when AIF1LRCLK_PD and

AIF1LRCLK_PU are both set to ‘1’, then a

‘bus keeper’ function is enabled on the

AIF1LRCLK pin.

AIF1BCLK_PU

AIF1BCLK Pull-Up Control

0 = Disabled

1 = Enabled

Note - when AIF1BCLK_PD and

AIF1BCLK_PU are both set to ‘1’, then a

‘bus keeper’ function is enabled on the

AIF1BCLK pin.

AIF1BCLK_PD

AIF1BCLK Pull-Down Control

0 = Disabled

1 = Enabled

Note - when AIF1BCLK_PD and

AIF1BCLK_PU are both set to ‘1’, then a

‘bus keeper’ function is enabled on the

AIF1BCLK pin.

AIF1RXDAT_PU

AIF1RXDAT Pull-Up Control

0 = Disabled

1 = Enabled

Note - when AIF1RXDAT_PD and

AIF1RXDAT_PU are both set to ‘1’, then a

‘bus keeper’ function is enabled on the

AIF1RXDAT pin.

AIF1RXDAT_PD

AIF1RXDAT Pull-Down Control

0 = Disabled

1 = Enabled

Note - when AIF1RXDAT_PD and

AIF1RXDAT_PU are both set to ‘1’, then a

‘bus keeper’ function is enabled on the

AIF1RXDAT pin.

Table 46 AIF1 Digital Pull-Up and Pull-Down Control

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