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WM8281ECS/R Scheda tecnica(PDF) 161 Page - Cirrus Logic

Il numero della parte WM8281ECS/R
Spiegazioni elettronici  Low Power Audio System with Ambient Noise Cancellation and Echo Cancellation
PDF  392 Pages
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Produttore elettronici  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8281ECS/R Scheda tecnica(HTML) 161 Page - Cirrus Logic

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WM8281
Rev 4.0
161
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1361
(0551h)
to
R1366
(0556h)
5:0
AIF2RX1_SLOT
[5:0]
0h
AIF2 RX Channel n Slot position
Defines the RX timeslot position of the
Channel n audio sample
Integer (LSB=1); Valid from 0 to 63
5:0
AIF2RX2_SLOT
[5:0]
1h
5:0
AIF2RX3_SLOT
[5:0]
2h
5:0
AIF2RX4_SLOT
[5:0]
3h
5:0
AIF2RX5_SLOT
[5:0]
4h
5:0
AIF2RX6_SLOT
[5:0]
5h
Table 41 AIF2 Digital Audio Data Control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1412
(0584h)
AIF3
Format
2:0
AIF3_FMT [2:0]
000
AIF3 Audio Interface Format
000 = DSP Mode A
001 = DSP Mode B
010 = I2S mode
011 = Left Justified mode
Other codes are Reserved
R1415
(0587h)
AIF3
Frame Ctrl
1
13:8
AIF3TX_WL [5:0]
18h
AIF3 TX Word Length
(Number of valid data bits per slot)
Integer (LSB = 1); Valid from 16 to 32
7:0
AIF3TX_SLOT_L
EN [7:0]
18h
AIF3 TX Slot Length
(Number of BCLK cycles per slot)
Integer (LSB = 1); Valid from 16 to 128
R1416
(0588h)
AIF3
Frame Ctrl
2
13:8
AIF3RX_WL [5:0]
18h
AIF3 RX Word Length
(Number of valid data bits per slot)
Integer (LSB = 1); Valid from 16 to 32
7:0
AIF3RX_SLOT_L
EN [7:0]
18h
AIF3 RX Slot Length
(Number of BCLK cycles per slot)
Integer (LSB = 1); Valid from 16 to 128
R1417
(0589h)
AIF3
Frame Ctrl
3
5:0
AIF3TX1_SLOT
[5:0]
0h
AIF3 TX Channel 1 Slot position
Defines the TX timeslot position of the
Channel 1 audio sample
Integer (LSB=1); Valid from 0 to 63
R1418
(058Ah)
AIF3
Frame Ctrl
4
5:0
AIF3TX2_SLOT
[5:0]
1h
AIF3 TX Channel 2 Slot position
Defines the TX timeslot position of the
Channel 2 audio sample
Integer (LSB=1); Valid from 0 to 63
R1425
(0591h)
AIF3
Frame Ctrl
11
5:0
AIF3RX1_SLOT
[5:0]
0h
AIF3 RX Channel 1 Slot position
Defines the RX timeslot position of the
Channel 1 audio sample
Integer (LSB=1); Valid from 0 to 63
R1426
(0592h)
AIF3
Frame Ctrl
12
5:0
AIF3RX2_SLOT
[5:0]
1h
AIF3 RX Channel 2 Slot position
Defines the RX timeslot position of the
Channel 2 audio sample
Integer (LSB=1); Valid from 0 to 63
Table 42 AIF3 Digital Audio Data Control



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