 |
Motore di ricerca datesheet componenti elettronici |
|
|
Motore di ricerca datesheet componenti elettronici |
|
WM8281ECS/R Scheda tecnica(PDF) 203 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
WM8281ECS/R Scheda tecnica(HTML) 203 Page - Cirrus Logic |
|
|
203 / 392 page  WM8281 Rev 4.0 203 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 8 SPK2_MUTE_EN DIAN 0 PDM Speaker Output 2 Mute Sequence Control 0 = Mute sequence is LSB first 1 = Mute sequence output is MSB first 7:0 SPK2_MUTE_SE Q [7:0] 69h PDM Speaker Output 2 Mute Sequence Defines the 8-bit code that is output on SPKDAT2 (left) or SPKDAT2 (right) when muted. R1171 (0493h) PDM SPK2 CTRL 2 0 SPK2_FMT 0 PDM Speaker Output 2 timing format 0 = Mode A (PDM data is valid at the rising/falling edges of SPKCLK2) 1 = Mode B (PDM data is valid during the high/low phase of SPKCLK2) Table 74 Digital Speaker (PDM) Output Control The digital speaker (PDM) outputs SPKDATn and SPKCLKn are intended for direct connection to a compatible external speaker driver. A typical configuration is illustrated in Figure 60. WM8281 Speaker Driver Speaker Driver Right Left Speaker Driver Speaker Driver Left Right SPKCLK1 SPKDAT1 SPKCLK2 SPKDAT2 Figure 60 Digital Speaker (PDM) Connection |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Italian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
