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WM8281ECS/R Scheda tecnica(PDF) 200 Page - Cirrus Logic

Il numero della parte WM8281ECS/R
Spiegazioni elettronici  Low Power Audio System with Ambient Noise Cancellation and Echo Cancellation
PDF  392 Pages
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Produttore elettronici  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8281ECS/R Scheda tecnica(HTML) 200 Page - Cirrus Logic

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WM8281
200
Rev 4.0
register configuration is required for the HPOUT3FB connection.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R659
(0293h)
Accessory
Detect
Mode 1
13
ACCDET_SRC
0
Accessory Detect / Headphone Feedback
pin select
0 = Accessory detect on MICDET1,
Headphone ground feedback on
HPOUT1FB1
1 = Accessory detect on MICDET2,
Headphone ground feedback on
HPOUT1FB2
Table 71 Headphone Output (HPOUT1) Ground Feedback Control
Earpiece
The HPOUT1FB1 or HPOUT1FB2 pin is
selected by the ACCDET_SRC register bit.
WM8281
HPOUT1L
HPOUT1R
HPOUT1FB1
HPOUT2L
HPOUT2R
HPOUT2FB
HPOUT1FB2
HPOUT3L
HPOUT3R
HPOUT3FB
Each headphone output can support stereo (single-
ended) or mono (differential) output. The illustration
shows the configuration for a typical application.
Figure 57 Headphone and Earpiece Connection
SPEAKER OUTPUTS (ANALOGUE)
The speaker driver outputs SPKOUTLP, SPKOUTLN, SPKOUTRP and SPKOUTRN provide two
differential (BTL) outputs suitable for direct connection to external loudspeakers. The integrated Class
D speaker driver provides high efficiency at large signal levels.
The speaker driver signal paths incorporate a boost function which shifts the signal levels between the
AVDD and SPKVDD voltage domains. The boost is pre-configured (+12dB) for the recommended
AVDD and SPKVDD operating voltages (see “Recommended Operating Conditions”).
Ultra-low leakage and high PSRR allow the speaker supply SPKVDD to be connected directly to a
lithium battery. Note that SPKVDDL powers the Left Speaker driver, and SPKVDDR powers the Right
Speaker driver; it is assumed that SPKVDDL = SPKVDDR = SPKVDD.
Note that SYSCLK must be present and enabled when using the Class D speaker output; see
“Clocking and Sample Rates” for details of SYSCLK and the associated register control fields.
The OUT4L and OUT4R output signal paths are associated with the analogue outputs SPKOUTLP,
SPKOUTLN, SPKOUTRP and SPKOUTRN.
The Class D speaker output is a pulse width modulated signal, and requires external filtering in order
to recreate the audio signal. With a suitable choice of external speakers, the speakers themselves can
provide the necessary filtering. See “Applications Information” for further information on Class D
speaker connections.
The external speaker connection is illustrated in Figure 58, assuming suitable speakers are chosen to
provide the PWM filtering.



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