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WM8281ECS/R Scheda tecnica(PDF) 237 Page - Cirrus Logic

Il numero della parte WM8281ECS/R
Spiegazioni elettronici  Low Power Audio System with Ambient Noise Cancellation and Echo Cancellation
PDF  392 Pages
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Produttore elettronici  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8281ECS/R Scheda tecnica(HTML) 237 Page - Cirrus Logic

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WM8281
Rev 4.0
237
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R329
(0149h)
Output
system
clock
15
OPCLK_ENA
0
OPCLK Enable
0 = Disabled
1 = Enabled
7:3
OPCLK_DIV [4:0]
00h
OPCLK Divider
00h = Divide by 1
01h = Divide by 1
02h = Divide by 2
03h = Divide by 3
…
1Fh = Divide by 31
2:0
OPCLK_SEL [2:0]
000
OPCLK Source Frequency
000 = 6.144MHz (5.6448MHz)
001 = 12.288MHz (11.2896MHz)
010 = 24.576MHz (22.5792MHz)
011 = 49.152MHz (45.1584MHz)
All other codes are Reserved
The frequencies in brackets apply for
44.1kHz-related SYSCLK rates only (ie.
SAMPLE_RATE_n = 01XXX).
The OPCLK Source Frequency must be
less than or equal to the SYSCLK
frequency.
R330
(014Ah)
Output
async clock
15
OPCLK_ASYNC_
ENA
0
OPCLK_ASYNC Enable
0 = Disabled
1 = Enabled
7:3
OPCLK_ASYNC_
DIV [4:0]
00h
OPCLK_ASYNC Divider
00h = Divide by 1
01h = Divide by 1
02h = Divide by 2
03h = Divide by 3
…
1Fh = Divide by 31
2:0
OPCLK_ASYNC_
SEL [2:0]
000
OPCLK_ASYNC Source Frequency
000 = 6.144MHz (5.6448MHz)
001 = 12.288MHz (11.2896MHz)
010 = 24.576MHz (22.5792MHz)
011 = 49.152MHz (45.1584MHz)
All other codes are Reserved
The frequencies in brackets apply for
44.1kHz-related ASYNCCLK rates only
(ie. ASYNC_SAMPLE_RATE_n =
01XXX).
The OPCLK_ASYNC Source Frequency
must be less than or equal to the
ASYNCCLK frequency.
Table 90 OPCLK and OPCLK_ASYNC Control



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