HC05V7GRSSLASHD datasheet(5/170 Pages) NXP

5 / 170 page

Page v

MC68HC05V7 Specification Rev. 1.0

SECTION 8

LOW-POWER MODES .................................................. 57

8.1

STOP INSTRUCTION ..............................................................57

8.1.1

STOP MODE .......................................................................57

8.1.2

WAIT INSTRUCTION..........................................................59

SECTION 9

PARALLEL I/O............................................................... 61

9.1

PORT A AND PORT C .............................................................61

9.1.1

PORT A/C DATA REGISTERS ............................................61

9.1.2

PORT A/C DATA DIRECTION REGISTER..........................62

9.1.3

PORT A/C I/O PIN INTERRUPTS.......................................62

9.2

PORT B ....................................................................................62

9.2.1

PORT B DATA REGISTER ..................................................63

9.2.2

PORT B DATA DIRECTION REGISTER .............................63

9.3

PORT D AND PORT E .............................................................63

9.4

PORT F.....................................................................................64

9.4.1

PORT F DATA REGISTER ..................................................64

9.4.2

PORT F DATA DIRECTION REGISTER..............................64

SECTION 10

A/D CONVERTER......................................................... 65

10.1

ANALOG SECTION..................................................................65

10.1.1

RATIOMETRIC CONVERSION ..........................................65

10.1.2

VREFH AND VREFL...............................................................65

10.1.3

ACCURACY AND PRECISION...........................................65

10.2

CONVERSION PROCESS .......................................................65

10.3

DIGITAL SECTION...................................................................65

10.4

A/D STATUS AND CONTROL REGISTER (ADSCR) ..............66

10.5

A/D DATA REGISTERS ...........................................................67

10.6

A/D DURING WAIT MODE.......................................................68

10.7

A/D DURING STOP MODE ......................................................68

SECTION 11

16-BIT TIMER ............................................................... 69

11.1

COUNTER REGISTER - $18:$19, $1A:$1B.............................70

11.2

OUTPUT COMPARE REGISTER - $16:$17 ............................70

11.3

INPUT CAPTURE REGISTER - $14:$15 .................................71

11.4

TIMER CONTROL REGISTER (TCR) - $12.............................72

11.4.1

ICIE - Input Capture Interrupt Enable..................................72

11.4.2

OCIE - Output Compare Interrupt Enable ...........................72

11.4.3

TOIE - Timer Overflow Interrupt Enable..............................72

11.4.4

TON - Timer On...................................................................72

11.4.5

IEDG - Input Edge ...............................................................72

11.4.6

OLVL - Output Level............................................................72

11.5

TIMER STATUS REGISTER (TSR) - $13 ................................72

11.5.1

ICF - Input Capture Flag......................................................73

11.5.2

OCF - Output Compare Flag ...............................................73

11.5.3

TOF - Timer Overflow Flag..................................................73

11.5.4

Bits 0-4 - Not used...............................................................73

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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