HC05V7GRSSLASHD datasheet(81/170 Pages) NXP

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SECTION 10: A/D CONVERTER

Page 67

MC68HC05V7 Specification Rev. 1.0

10.4.2

ADRC - RC Oscillator Control

When ADRC is set, the A/D section runs on the internal RC oscillator instead of the CPU

clock. The RC oscillator requires a time t

RCON to stabilize, and results can be inaccurate

during this time.

10.4.3

ADON - A/D On

When the A/D is turned on (ADON = 1), it requires a time t

ADON for the current sources to

stabilize, and results can be inaccurate during this time. This bit turns on the charge pump.

10.4.4

CH4:CH0 - Channel Select Bits

CH4, CH3, CH2, CH1, and CH0 form a 5-bit field which is used to select one of twenty A/

D channels, including four internal references. Channels $0-7 correspond to Port D input

pins on the MCU. Channels $8-F correspond to Port E input pins on the MCU and are not

bonded out in 56 pin packaged parts. Channels $10-13 are used for internal reference

points. In Single-Chip Mode, channel $13 is reserved and converts to $00. The following

table shows the signals selected by the channel select field.

Table 10-1: A/D Channel Assignments

10.5

A/D DATA REGISTERS

An 8-bit result register is provided. This register is updated each time the COCO bit is set.

Figure 10-2:

A/D Data Register

CH4:CH0

Signal

00-07

AN0-7

08-0F

AN8-15

REFH

REFH-

REFL)/2

REFL

Factory

Test

Unused

$1D

* Accuracy not guaranteed for internal channels

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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