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HC05V7GRS/D Scheda tecnica(PDF) 94 Page - NXP Semiconductors

Il numero della parte HC05V7GRS/D
Spiegazioni elettronici  Low cost, HC05 Core
PDF  170 Pages
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC05V7GRS/D Scheda tecnica(HTML) 94 Page - NXP Semiconductors

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SECTION 13: PULSE WIDTH MODULATOR
Page 80
MC68HC05V7 Specification Rev. 1.0
When the PWM subsystem is enabled, a write to the PWM Data Register will not become
effective until the following condition has been met.
The end of the current PWM period has occurred, at which time the new
data value is loaded into the PWM Data Register.
However, should a write to the registers be performed when the PWM subsystem is
disabled, the data is transferred immediately. All Registers are updated after the PWM Data
Register is written to and the end of a PWM cycle occurs.
The PWM output can have an active high or an active low pulse under software control
using the POL (polarity) bit as shown in Figure 13-2 and Figure 13-3.
Figure 13-2:
PWM Waveform Examples (POL = 1)
Figure 13-3:
PWM Waveform Examples (POL = 0)
$05
$3F
$1F
PWM register = $x0
T
$05
$1F
PWM register = $x0
T
$3F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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