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HC05V7GRS/D Scheda tecnica(PDF) 88 Page - NXP Semiconductors |
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HC05V7GRS/D Scheda tecnica(HTML) 88 Page - NXP Semiconductors |
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88 / 170 page ![]() SECTION 11: 16-BIT TIMER Page 74 MC68HC05V7 Specification Rev. 1.0 capture detect circuit is armed. This does not set any timer flags nor wake up the MCU, but when the MCU does wake up, there is an active input capture flag and data from the first valid edge that occurred during the STOP mode. If RESET is used to exit STOP mode, then no input capture flag or data remains, even if a valid input capture edge occurred. Figure 11-4: TCAP Timing TCAP tTLTL tTL tTH Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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