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HC05V7GRS/D Scheda tecnica(PDF) 57 Page - NXP Semiconductors |
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HC05V7GRS/D Scheda tecnica(HTML) 57 Page - NXP Semiconductors |
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57 / 170 page ![]() SECTION 6: RESETS Page 43 MC68HC05V7 Specification Rev. 1.0 Table 6-1: COP Watchdog Timer Recommendations 6.2.3.5 COP REGISTER The COP register is shared with the MSB of an unimplemented User Interrupt Vector as shown in Figure 6-3. Reading this location will return whatever user data has been programmed at this location. Writing a “0” to the COPR bit in this location will clear the COP watchdog timer. Figure 6-3: COP Watchdog Timer Location 6.2.4 LOW-VOLTAGE RESET (LVR) The internal low voltage (LVR) reset is generated when VDD falls below the LVR threshold VLVRI and will be released following a POR delay starting when VDD rises above VLVRR. The LVR threshold is tested to be above the minimum operating voltage of the microcontroller and is intended to ensure that the CPU will be held in reset when the VBATT supply voltage is below reasonable operating limits. However, it should be noted that the LVR monitors VDD not VBATT. A mask option is provided to disable the LVR when the device is expected to normally operate at low voltages. Note that the V DD rise and fall slew rates (S VDDR and SVDDF) must be within the specification for proper LVR operation. If the specification is not met, the circuit will operate properly following a delay of V DD/Slew rate. The LVR will generate the RST signal that will reset the CPU and other peripherals. As it is not possible to determine the level of the internal VDD at the point VBATT recovers (and POR is not intended to detect a loss of VDD), an LVR will always recover using a POR delay. The low voltage reset will activate the internal pulldown device connected to the RESET pin. WAIT Time Less than COP Time-Out STOP Instruction WAIT Time THEN the COP Watchdog Timer should be as follows: Disable COP by mask option converted to reset Enable or disable COP by mask option WAIT Time More than COP Time-Out any length WAIT Time Acts as STOP Disable COP by mask option converted to reset IF the following conditions exist: UNIMPLEMENTED VECTOR & COP WATCHDOG TIMER x $3FF0 W R COPR UNIMPLEMENTED READ WRITE ADDR 1 0 2 3 4 5 6 7 REGISTER x x x x x x x Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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