HC05V7GRSSLASHD datasheet(150/170 Pages) NXP

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SECTION 16: INSTRUCTION SET

Page 136

MC68HC05V7 Specification Rev. 1.0

16.6.1

IMMEDIATE

In the immediate addressing mode, the operand is contained in the byte immediately

following the opcode. The immediate addressing mode is used to access constants that do

not change during program execution (for example, a constant used to initialize a loop

counter).

16.6.2

DIRECT

In the direct addressing mode, the effective address of the argument is contained in a single

byte following the opcode byte. Direct addressing allows the user to directly address the

lowest 256 bytes in memory with single 2-byte instructions.

16.6.3

EXTENDED

In the extended addressing mode, the effective address of the argument is contained in the

2 bytes following the opcode byte. Instructions with extended addressing mode are capable

of referencing arguments anywhere in memory with a single 3-byte instruction. When using

the Motorola assembler, the user need not specify whether an instruction uses direct or

extended addressing. The assembler automatically selects the shortest form of the

instruction.

16.6.4

RELATIVE

The relative addressing mode is only used in branch instructions. In relative addressing,

the contents of the 8-bit signed offset byte (which is the last byte of the instruction) is added

to the PC if, and only if, the branch conditions are true. Otherwise, control proceeds to the

next instruction. The span of relative addressing is from -128 to +127 from the address of

the next opcode. The programmer need not calculate the offset when using the Motorola

assembler, since it calculates the proper offset and checks to see that it is within the span

of the branch.

16.6.5

INDEXED, NO OFFSET

In the indexed, no offset addressing mode, the effective address of the argument is

contained in the 8-bit index register. This addressing mode can access the first 256

memory locations. These instructions are only 1 byte long. This mode is often used to move

a pointer through a table or to hold the address of a frequently referenced RAM or I/O

location.

16.6.6

INDEXED, 8-BIT OFFSET

In the indexed, 8-bit offset addressing mode, the effective address is the sum of the

contents of the unsigned 8-bit index register and the unsigned byte following the opcode.

The addressing mode is useful for selecting the Kth element in an element table. With this

2-byte instruction, K would typically be in X with the address of the beginning of the table

in the instruction. As such, tables may begin anywhere within the first 256 addressable

locations and could extend as far as location 510. $1FE is the highest location that can be

accessed in this way.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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