HC05V7GRSSLASHD datasheet(104/170 Pages) NXP

104 / 170 page

SECTION 14: SERIAL PERIPHERAL INTERFACE

Page 90

MC68HC05V7 Specification Rev. 1.0

14.4

SPI IN STOP MODE

When the MCU enters the STOP mode, the baud rate generator which drives the SPI shuts

down. This essentially stops all master mode SPI operation; thus, the master SPI is unable

to transmit or receive any data. If the STOP instruction is executed during an SPI transfer,

that transfer is halted until the MCU exits the stop mode (provided it is an exit resulting from

a viable interrupt source). If the stop mode is exited by a reset, then the appropriate control/

status bits are cleared and the SPI is disabled. If the device is in the slave mode when the

STOP instruction is executed, the slave SPI will still operate. It can still accept data and clock

information in addition to transmitting its own data back to a master device.

At the end of a possible transmission with a slave SPI in the stop mode, no flags are set until

a viable interrupt results in an MCU "wake up". Caution should be observed when operating

the SPI (as a slave) during the stop mode because none of the protection circuitry (write

collision, mode fault, etc.) is active.

It should also be noted that when the MCU enters the stop mode all enabled output drivers

(MISO, MOSI, and SCLK ports) remain active and any sourcing currents from these outputs

will be part of the total supply current required by the device.

14.5

SPI IN WAIT MODE

The SPI subsystem remains active in wait mode. Therefore, it is consuming power. If it is

desired to reduce power, the SPI should be shut off prior to entering wait mode. A non-

resetexit from wait mode will result in the state of the SPI being unchanged. A reset exit will

return the SPI to its reset state, which is disabled.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC05V7GRS/D Scheda tecnica(PDF) 104 Page - NXP Semiconductors