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HC05V7GRS/D Scheda tecnica(PDF) 140 Page - NXP Semiconductors |
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HC05V7GRS/D Scheda tecnica(HTML) 140 Page - NXP Semiconductors |
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140 / 170 page ![]() SECTION 15: MESSAGE DATA LINK CONTROLLER Page 126 MC68HC05V7 Specification Rev. 1.0 15.6.2 MUX INTERFACE SIGNALS There are five signals which pass between the Physical Interface and the MUX Interface section of the MDLC as shown in Figure 15-16: MDLC Physical Interface Outline. These signals are now described. 15.6.2.1 Sleep/Wake This input signal is used to control the power consumption of the Physical Interface transmitter. When driven high by the MUX interface, the transmitter will enter a low power consumption Sleep mode. This will happen whenever the CPU executes a STOP or WAIT instruction. The transmitter is not capable of transmitting while it is in the Sleep mode. When driven low by the MUX interface, the transmitter will ’wake-up’ and become capable of transmitting messages. This will happen when the MDLC enters the Run mode. 15.6.2.2 Wake This input signal is used to exit the low power consumption mode of the Physical Interface transmitter. The MUX interface will drive this signal high and then low to notify the transmitter to wake up from Sleep mode. This will happen whenever the transmitter is in the Sleep mode and a passive to active transition occurs on the J1850 bus, causing the RxP signal to transition from low to high. 15.6.2.3 Prst This is the reset signal input to the Physical Interface. This signal is normally low and the MUX Interface will drive this signal high to reset the Physical Interface control circuits. 15.6.2.4 Txp This input signal represents the digital serial transmit data from the MUX Interface to the Physical Interface. When sending a passive phase, this signal will be driven low. When sending an active phase, this signal will be driven high. 15.6.2.5 Rxp This output signal represents the digital serial receive data from the Physical Interface to the MUX Interface. When receiving an active phase, this signal will be driven high. When receiving a passive phase this signal will be driven low. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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